Now this is interesting … AVX-512 are 512-bit Advanced Vector Extensions which are normally found on Intel processors, but they could supported by AMD’s Zen 4 Core in EPYC Genoa.
Taken from Videocardz … AMD Zen4 in EPYC 7xx4 series codenamed “Genoa” have leaked. We have learned that the new server processors will be 96 core and support 12 channel DDR5 memory, but we also learned it will have PCI Gen5 support. The internal configuration of the chiplets has also been leaked.
AMD Genoa will require a new SP5 socket. This socket will support CPUs with the LGA6096 package measuring 72×75.4 mm, according to another leak from Patrick Schur. The package is not a perfect square, but not as rectangular as SP3-based EPYC processors. The new package will have a lot more room for future chiplet designs, with the first being 12 chiplets plus 1 I/O die. The first generation SP5 EPYC will be limited to 96 cores though, according to a leak from ExecutableFix.
Today a part of a new slide deck has allegedly leaked on Chiphell. The slide appears to list all features of the new Zen4 cores, confirming it would have more than 64 cores and support 2 threads per core. It was previously rumored that Genoa might have 4 threads per core, but that was quickly debunked. More importantly, though, the slide would suggest that Zen4 supports AVX3-512 and BFLOAT16 instructions. Both are extensively used in deep learning computations. The AVX 512 support on Intel CPUs and accelerators one of the key advantages over the AMD EPYC series. If this leak is true, then this is about to change.
ExecutableFix, who yesterday leaked the Zen4 details, has already confirmed that AVX3-512 support is indeed coming to the EPYC series.