All thanks to 3D V-Cache!
Taken from Notebookcheck … Some of AMD’s upcoming RDNA 3 GPUs are rumored to have a Multiple Chip Module (MCM) design with one 5 nm GCD (Graphics Complex Dies) and multiple 6 nm MCDs (Memory Complex Dies). Serial leaker Kepler_L2 has now shone some more light on the possible memory configuration of the RDNA 3 chips.
According to the leaker, the Navi 31 GPU with six MCDs each 64-bit wide is “looking more and more likely” with a total cache size of 384 MB. As far as the memory structure goes, Kepler mentions 32 MB of cache per 64-bit MCD for a total of 192 MB of Infinity Cache. There is the possibility of an additional 32 MB of 3D V-Cache on top of each MCD on some models. Combine the Infinity Cache and the rumored V-Cache and we have a total of 384 MB.
So then can we think 64M per MCD?
— 포시포시 (@harukaze5719) July 13, 2022
If there are indeed six 64-bit MCDs in a Navi 31 GPU, the board will have a 384-bit wide memory bus. Per VideoCardz, assuming the memory is running at 18 Gbps as it is rumored, the RX 7900 XT could have a total bandwidth of 864 GB/s, 50% higher than the RX 6950 XT without the bandwidth afforded by the Infinity Cache.